Superconducting Qubit Coherence Times Surpass 1 Millisecond Milestone

Superconducting qubits, the leading platform for quantum processors, have long been limited by short coherence times—the duration over which quantum information remains intact. A major breakthrough has now pushed this frontier past the 1-millisecond mark, a threefold improvement over previous state-of-the-art devices. Researchers achieved this by engineering new tantalum-based Josephson junctions and optimizing surface treatments to eliminate two-level-system defects that cause energy loss. The resulting qubits demonstrate T1 and T2 times exceeding 1.1 milliseconds, allowing thousands of gate operations before decoherence degrades the computation. This milestone is not merely symbolic; it directly enables deeper quantum circuits and more complex algorithms, especially when combined with mid-circuit measurement and feed-forward operations. Moreover, improved coherence relaxes the timing constraints for classical control electronics, reducing hardware complexity and cost. The team’s fabrication process is fully compatible with existing CMOS foundry techniques, meaning the innovation can be rapidly deployed across both academic and industrial quantum systems. These longer-lived qubits also provide a more stable platform for quantum error mitigation, where partial noise reduction can be achieved without full fault tolerance. As a result, near-term quantum advantage in chemistry and optimization becomes significantly more plausible. The next target is reaching 10-millisecond coherence while maintaining high gate fidelities above 99.9%, a goal that now seems attainable given the rapid pace of materials improvements and circuit design innovations.

Topological Qubits Demonstrate Non-Abelian Braiding in Hardware

One of the most anticipated hardware advances in quantum computing is the realization of topological qubits, which promise intrinsic protection against local noise. For the first time, a international collaboration has experimentally demonstrated non-Abelian braiding of Majorana zero modes in a hybrid semiconductor-superconductor nanowire device. By carefully controlling gate voltage pulses, the researchers moved Majorana quasiparticles around one another in a two-dimensional labyrinth, executing a sequence of exchanges that produced deterministic changes in the ground-state degeneracy—a signature of non-Abelian statistics. This braiding operation, known as a twist in the braid group, can be used as a logical two-qubit gate that is topologically protected from small perturbations. The experiment required ultraclean epitaxial growth of InAs nanowires coated with aluminum, combined with quantum dot charge sensors for real-time readout. The measured braiding phase matched theoretical predictions within experimental uncertainty, validating the underlying physics. While the current device only hosts four Majorana modes and performs a single braid, it establishes the fundamental building block for a scalable topological quantum processor. The main advantage is that such qubits have exponentially suppressed error rates with increasing separation of modes, reducing overhead for error correction. However, challenges remain: the braiding time is still slower than conventional gate operations, and detecting the non-Abelian state required extensive averaging over millions of repetitions. Nevertheless, this achievement marks a watershed moment, demonstrating that topological protection is not just a theoretical curiosity but a working hardware feature. Future work will focus on integrating braiding with measurement-based initialisation and developing scalable crossbar architectures that route Majorana modes without unwanted interactions.

Cryo-CMOS Control Chips Scale Up Quantum Processor Integration

As quantum processors grow from dozens to thousands of qubits, conventional room-temperature control electronics become an insurmountable bottleneck, as each qubit requires multiple coaxial cables for microwave pulses and DC biases. A pivotal hardware innovation addresses this by embedding control circuits directly inside the dilution refrigerator, right next to the quantum chip. Cryogenic complementary metal-oxide-semiconductor (cryo-CMOS) chips, fabricated in standard 28-nanometer processes, now operate at 4 K temperatures while delivering precise gate voltage pulses and readout digitisation. In a recent demonstration, a cryo-CMOS chip successfully controlled an array of 1024 superconducting qubits using only 256 high-frequency input lines, achieving a tenfold reduction in cable count. The chip integrates digital-to-analog converters, low-noise amplifiers, and multiplexers in a compact package, with power dissipation under 10 milliwatts to avoid overwhelming the cooling capacity of the refrigerator. More importantly, the control fidelity at cryogenic temperatures reached 99.7% for single-qubit gates and 99.2% for two-qubit gates, comparable to room-temperature systems. The designers overcame the long-standing issue of heat-induced noise by using carefully biased transistor layouts and dynamic voltage scaling to suppress thermal leakage. This breakthrough enables the modular expansion of quantum processors: multiple cryo-CMOS tiles can tile together, each controlling a small block of qubits, connecting via low-loss superconducting interposers. Since the control electronics are fabricated on standard silicon wafers, cost per qubit could drop by orders of magnitude. This technology is already being commercialised for next-generation systems with 10,000 logical qubits. The ability to operate control logic at 4 K rather than 300 K also reduces latency and improves synchronisation across qubits, essential for real-time error correction. The scalability demonstrated by cryo-CMOS is widely regarded as one of the most critical steps toward practical quantum computing.

Modular Quantum Processor Architecture Enables Error-Corrected Logic Operations

Achieving fault-tolerant quantum computing requires more than high-fidelity qubits; it demands an architecture capable of implementing quantum error correction codes that can correct errors faster than they occur. A major hardware milestone was recently reported: a modular quantum processor based on tiled superconducting qubit modules connected through low-loss, high-bandwidth couplers demonstrated error-corrected logical qubits operating at better-than-physical-error rates. The system uses the surface code, where each logical qubit is encoded in an array of physical qubits, and error syndromes are extracted repeatedly using high-fidelity ancilla measurements. The modular design overcomes the yield problem of monolithic chips—if one physical qubit fails, the module containing it can be replaced without discarding the entire processor. In a benchmark experiment, the team entangled four logical qubits across two modules, executing a logical CNOT gate with a logical error rate of 0.8%, which is significantly lower than any single physical two-qubit gate in the system. This was achieved through a combination of improved qubit coherence, fast mid-circuit reset, and a real-time feedback controller that processes syndrome data in less than 1 microsecond. The inter-module coupler uses a tunable superconducting inductor to enable high-fidelity two-qubit gates between neighboring modules with crosstalk below 0.1%. Furthermore, the architecture is designed to be software-configurable, allowing different error correction schemes (e.g., surface code vs. color code) to be implemented without hardware changes. This modularity also simplifies thermal management, as each module can be independently calibrated and maintained. The implications for hardware development are profound: companies can scale up by adding more modules rather than redesigning a giant single chip. This approach also naturally supports distributed entanglement and quantum networking, providing a clear path toward clusters of quantum processors. The demonstration of error-corrected logic operations across modules is considered by many experts to be the most convincing evidence that fault-tolerant quantum computers are within reach within the next decade.